sc2vhdl

SystemC to VHDL translation tool.

Contents:

1. What is it?
2. Download and installation
3. About the author

1. What is it?

sc2vhdl is a software tool for extraction of a model from source texts in the SystemC language, which is used in the industry for simulation of digital circuits. Contrary to other similar programs the structure of a hardware is extracted from the model which has been elaborated. Therefore even models constructed dynamically can be processed.

The primary output of the program is VHDL source code transformed from the input file in the SystemC language. The transformation of the extracted information, namely of the data types used, is driven by declarations in a user-specified configuration file. As the secondary outputs the program generates diagrams of the model structure. The diagrams may be found useful when studying an unknown circuit.

The syntax analysis of the input files is provided by modified GCC compiler, the program itself is written in the C++ language.

2. Download and instalation

sc2vhdl package:

download sc2vhdl package from sf.net - select the latest release.

Follow instructions in file README_EN in the package. The same information is also available here online for your ease reference.

Furthemore, my masters diploma thesis about sc2vhdl (in czech) is available too in a PDF file.

3. About the author

Jaroslav Sýkora, email: jaroslav.sykora at gmail.com,
Visit me at my home page, or check out my other SF.NET project RheaVFS.

This page was last updated on 2009-06-22